精确的三通道集成时间计数器

R. Szplet, P. Kwiatkowski, Z. Jachna, K. Rozyc
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引用次数: 2

摘要

我们提出了一个设计,基于fpga的实现和一个新的三通道时间间隔计数器的测试结果,该计数器是为一个名为合法时间分配系统(LTDS)的项目开发的。计数器的主要目的是收集LTDS中涉及的时钟的时间漂移信息,然后评估它们的稳定性,最后选择最稳定的时钟作为本地时钟。计数器提供了高的测量精度(15),这是通过结合周期计数和两阶段时间插值获得的。时间计数器是在一个普遍可用的和相对便宜的可编程设备从斯巴达-6 (Xilinx)。
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Precise three-channel integrated time counter
We present a design, FPGA-based implementation and test results of a new three-channel time interval counter developed for a project called Legal Time Distribution System (LTDS). The main aim of the counter is to gather information about time drift of clocks involved into the LTDS, then to evaluate their stability, and finally to select the most stable one as a local clock. The counter provides a high measurement precision (<; 15 ps) and wide range (> 1s) that are obtained by combining period counting with two-stage time interpolation. The time counter is implemented in a universally available and relatively cheap programmable device from family Spartan-6 (Xilinx).
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