频率估计和控制的不同锁相环实现的比较

Álvaro Ortega, F. Milano
{"title":"频率估计和控制的不同锁相环实现的比较","authors":"Álvaro Ortega, F. Milano","doi":"10.1109/ICHQP.2018.8378935","DOIUrl":null,"url":null,"abstract":"Accurate and fast-responding Phase-Locked Loops (PLLs) are crucial for the implementation of primary frequency controllers of non-synchronous generation and energy storage devices that are connected to the grid through power electronic converters. PLLs are primarily designed to synchronize a converter to the grid and their ability to estimate frequency deviations is a design-dependent, not necessarily optimized byproduct. The goal of the paper is to establish which design better filters noise and reduces numerical spikes after sudden variations of the voltage at the terminal ac bus of the converter. To this aim, the paper compares five well-assessed PLL implementations through a standard IEEE benchmark system considering both contingencies and noise.","PeriodicalId":6506,"journal":{"name":"2018 18th International Conference on Harmonics and Quality of Power (ICHQP)","volume":"411 1","pages":"1-6"},"PeriodicalIF":0.0000,"publicationDate":"2018-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"34","resultStr":"{\"title\":\"Comparison of different PLL implementations for frequency estimation and control\",\"authors\":\"Álvaro Ortega, F. Milano\",\"doi\":\"10.1109/ICHQP.2018.8378935\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Accurate and fast-responding Phase-Locked Loops (PLLs) are crucial for the implementation of primary frequency controllers of non-synchronous generation and energy storage devices that are connected to the grid through power electronic converters. PLLs are primarily designed to synchronize a converter to the grid and their ability to estimate frequency deviations is a design-dependent, not necessarily optimized byproduct. The goal of the paper is to establish which design better filters noise and reduces numerical spikes after sudden variations of the voltage at the terminal ac bus of the converter. To this aim, the paper compares five well-assessed PLL implementations through a standard IEEE benchmark system considering both contingencies and noise.\",\"PeriodicalId\":6506,\"journal\":{\"name\":\"2018 18th International Conference on Harmonics and Quality of Power (ICHQP)\",\"volume\":\"411 1\",\"pages\":\"1-6\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-05-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"34\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 18th International Conference on Harmonics and Quality of Power (ICHQP)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICHQP.2018.8378935\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 18th International Conference on Harmonics and Quality of Power (ICHQP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICHQP.2018.8378935","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 34

摘要

精确和快速响应的锁相环(pll)对于通过电力电子变流器连接到电网的非同步发电和储能设备的主频率控制器的实现至关重要。锁相环主要用于将转换器与电网同步,其估计频率偏差的能力取决于设计,不一定是优化的副产品。本文的目的是确定哪种设计能更好地滤除噪声,并在变换器终端交流母线电压突然变化后减少数值尖峰。为此,本文通过标准的IEEE基准系统比较了五种经过良好评估的锁相环实现,同时考虑了偶然性和噪声。
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Comparison of different PLL implementations for frequency estimation and control
Accurate and fast-responding Phase-Locked Loops (PLLs) are crucial for the implementation of primary frequency controllers of non-synchronous generation and energy storage devices that are connected to the grid through power electronic converters. PLLs are primarily designed to synchronize a converter to the grid and their ability to estimate frequency deviations is a design-dependent, not necessarily optimized byproduct. The goal of the paper is to establish which design better filters noise and reduces numerical spikes after sudden variations of the voltage at the terminal ac bus of the converter. To this aim, the paper compares five well-assessed PLL implementations through a standard IEEE benchmark system considering both contingencies and noise.
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