基于抗攻击感测放大器的PUF (SA-PUF)具有PUF响应的确定性和可控可靠性

M. Bhargava, Cagla Cakir, K. Mai
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引用次数: 52

摘要

物理不可克隆函数(puf)实现了特定于芯片的随机函数,在各种安全应用中提供了一种很有前途的机制。PUF响应的稳定性或可靠性是一个关键问题,特别是当包含PUF的IC受到严重环境变化的影响时。在密码学应用中,响应位中的错误需要完全纠正,这通常使用昂贵的纠错码(ECC)来完成。然而,在识别和认证应用中,响应位的完全校正是不必要的,因此可以避免昂贵的ECC方案。另一方面,具有错误位的响应不能通过单向函数进行后条件反射,从而增加了建模攻击的脆弱性。我们提出了一种基于感测放大器的PUF (SA-PUF)结构,该结构产生的随机比特具有更高的可靠性,从而大大减少了响应比特的错误。这消除了加密应用中复杂和昂贵的ECC电路的需要。此外,随着ECC实现成本的降低,即使在识别和身份验证应用程序中,使用单向函数对输出进行后处理也变得更加可行,从而增加了它们对基于建模的攻击的弹性。最后,与大多数早期提出的硅基PUF结构相比,SA-PUF元件天生对环境变化更有弹性。在65nm块体CMOS工业工艺中的仿真数据表明,与其他PUF实现相比,在类似的环境变化下,基于sa的PUF的误差降低了2.5 -3.5倍。
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Attack resistant sense amplifier based PUFs (SA-PUF) with deterministic and controllable reliability of PUF responses
Physically Unclonable Functions (PUFs) implement die specific random functions that offer a promising mechanism in various security applications. Stability or reliability of a PUF response is a key concern, especially when the IC containing the PUF is subjected to severe environmental variations. In cryptographic applications, errors in response bits need to be completely corrected and this is often done using costly error correction codes (ECC). In identification and authentication applications however, a complete correction of response bits is not necessary and hence costly ECC schemes can be avoided. On the flip side, a response with faulty bits cannot be post-conditioned by one-way functions, resulting in an increased vulnerability to modeling attacks. We propose a sense amplifier based PUF (SA-PUF) structure that generates random bits with increased reliability, resulting in significantly fewer errors in response bits. This eliminates the need of complex and costly ECC circuitry in cryptographic applications. Further, with the reduced cost of ECC implementation, the use of one-way functions to post-condition the outputs becomes more viable even in identification and authentication applications, thereby increasing their resilience to modeling based attacks. Finally, SA-PUF elements are inherently more resilient to environmental changes as compared to most of the earlier proposed silicon based PUF structures. Simulation data in 65nm bulk CMOS industrial process show that SA-based PUFs have 2.5x-3.5x lower errors compared to other PUF implementations when subjected to similar environmental variations.
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