{"title":"使用现场可编程门阵列或图形处理单元实现相位展开:比较","authors":"S. Braganza, M. Leeser","doi":"10.1109/HPRCTA.2008.4745687","DOIUrl":null,"url":null,"abstract":"Phase unwrapping is the process of converting discontinuous phase data into a continuous image. This procedure is required by any imaging technology that uses phase data such as MRI, SAR or OQM microscopy. Such algorithms often take a significant amount of time to process on a general purpose computer, rendering it difficult to process large quantities of information. This paper compares implementations of a specific phase unwrapping algorithm known as Minimum LP norm unwrapping on a field programmable gate array (FPGA) and on a graphics processing unit (GPU) for the purpose of acceleration. The computation required involves a matrix preconditioner (based on a DCT transform) and a conjugate gradient calculation along with a few other matrix operations. These functions are partitioned to run on the host or the accelerator depending on the capabilities of the accelerator. The tradeoffs between the two platforms are analyzed and compared to a general purpose processor (GPP) in terms of performance, power and cost.","PeriodicalId":59014,"journal":{"name":"高性能计算技术","volume":"3 1","pages":"1-10"},"PeriodicalIF":0.0000,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Implementing phase unwrapping using Field Programmable Gate Arrays or Graphics Processing Units: A comparison\",\"authors\":\"S. Braganza, M. Leeser\",\"doi\":\"10.1109/HPRCTA.2008.4745687\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Phase unwrapping is the process of converting discontinuous phase data into a continuous image. This procedure is required by any imaging technology that uses phase data such as MRI, SAR or OQM microscopy. Such algorithms often take a significant amount of time to process on a general purpose computer, rendering it difficult to process large quantities of information. This paper compares implementations of a specific phase unwrapping algorithm known as Minimum LP norm unwrapping on a field programmable gate array (FPGA) and on a graphics processing unit (GPU) for the purpose of acceleration. The computation required involves a matrix preconditioner (based on a DCT transform) and a conjugate gradient calculation along with a few other matrix operations. These functions are partitioned to run on the host or the accelerator depending on the capabilities of the accelerator. The tradeoffs between the two platforms are analyzed and compared to a general purpose processor (GPP) in terms of performance, power and cost.\",\"PeriodicalId\":59014,\"journal\":{\"name\":\"高性能计算技术\",\"volume\":\"3 1\",\"pages\":\"1-10\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"高性能计算技术\",\"FirstCategoryId\":\"1093\",\"ListUrlMain\":\"https://doi.org/10.1109/HPRCTA.2008.4745687\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"高性能计算技术","FirstCategoryId":"1093","ListUrlMain":"https://doi.org/10.1109/HPRCTA.2008.4745687","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Implementing phase unwrapping using Field Programmable Gate Arrays or Graphics Processing Units: A comparison
Phase unwrapping is the process of converting discontinuous phase data into a continuous image. This procedure is required by any imaging technology that uses phase data such as MRI, SAR or OQM microscopy. Such algorithms often take a significant amount of time to process on a general purpose computer, rendering it difficult to process large quantities of information. This paper compares implementations of a specific phase unwrapping algorithm known as Minimum LP norm unwrapping on a field programmable gate array (FPGA) and on a graphics processing unit (GPU) for the purpose of acceleration. The computation required involves a matrix preconditioner (based on a DCT transform) and a conjugate gradient calculation along with a few other matrix operations. These functions are partitioned to run on the host or the accelerator depending on the capabilities of the accelerator. The tradeoffs between the two platforms are analyzed and compared to a general purpose processor (GPP) in terms of performance, power and cost.