基于Fpga的国防雷达脉冲序列识别解决方案

Pandu, N. Balaji, C. D. Naidu
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引用次数: 3

摘要

本文的主要目的是设计一种用于雷达信号处理应用的多相码识别的通用体系结构。提出的VLSI架构将识别给定多相代码的类型、相位变化的量和相位变化的数量。雷达信号处理应用需要一组具有各自峰值自相关和成对互相关的序列。获得这样的序列是一个组合问题。本文旨在实现一种高效的VLSI系统,用于设计雷达应用中的多相码识别。VLSI系统在现场可编程门阵列上实现,因为它提供了可重构和可编程的灵活性,并且它是一种识别多相码的实时信号处理解决方案。仿真结果和FPGA实现表明,对于给定的输入序列,可以成功地识别代码、相位数量、相位变化次数。
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FPGA BASED SOLUTION FOR THE IDENTIFICATION OF RADAR PULSE SEQUENCES FOR DEFENSE APPLICATIONS
The main objective of this paper is to design a generalized architecture for polyphase code identification used in RADAR signal processing applications. The proposed VLSI architecture will identify the type of a given polyphase code, amount of phase change and number of phase changes. RADAR signal processing applications require a set of sequences with individually peaky autocorrelation and pair wise cross correlation. Obtaining such sequences is a combinatorial problem. This paper aims at implementation of an efficient VLSI system for the design of polyphase codes identification useful for RADAR applications. The VLSI system is implemented on the field programmable gate array as it provides the flexibility of reconfigurability and reprogrammability and it is a real time signal processing solution which identifies the polyphase codes. The simulation results and the FPGA implementation shows the successful code identification, amount of phase, number of phase changes for a given input sequence.
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