Demo: Ker-ONE: Embedded virtualization approach with dynamic reconfigurable accelerators management

Today, the CPU-FPGA hybrid architecture has become more and more popular in embedded systems. In this approach CPU and FPGA domains are tightly connected by dedicated interconnections, which makes it possible to enhance the traditional CPU virtualization with the dynamic partial reconfiguration (DPR) technology on FPGA. Our research is intended to propose an innovative approach Ker-ONE, which provides a lightweight micro-kernel to support real-time virtualization. Plus, it provide an abstract and transparent layer for virtual machines (VM) to access reconfigurable accelerators. In this demo, the proposed framework is implemented on ARM-FPGA platform, and the mechanism of real-time scheduling/allocation is presented in details via GUI demonstration. We have shown that our approach manages to achieve the a high level of performance with low overheads.