Naveen Motamarri, Munshi Nurul Islam, P. Apurbaranjan, S. Deepu, S. Prasantakumar
{"title":"一种用于3.5GHz Wi-MAX和W-CDMA应用的高增益源退化级联码LNA","authors":"Naveen Motamarri, Munshi Nurul Islam, P. Apurbaranjan, S. Deepu, S. Prasantakumar","doi":"10.1109/ICCICCT.2014.6993143","DOIUrl":null,"url":null,"abstract":"This paper presents the design and simulation of High gain Source degenerated Cascode LNA for Wi-max and W-CDMA applications at 3.5GHz. The design uses an enhanced cascade topology to attain improved forward gain and noise figure. Th is design includes lumped elements like inductor, capacitor and resistors to design input and output matching networks. The targeted narrow-band gain, impedance matching and noise figure are achieved at the 3.5GHz. Circuit has been designed Using standard UMC 0.18μm CMOS technology and simulated in the Cadence Spectre RF tool. Targeted narrowband gain, noise figure, are 25dB and 2dB respectively. The designed circuit exhibits narrow-band gain of 27.18 dB and noise figure of 1.7 dB with Input and output return loss of -17.57 dB and -29.21 dB respectively. Circuit operates from the supply voltage of 1.8V and draws a current of 6.39mA.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"95 1","pages":"1200-1204"},"PeriodicalIF":0.0000,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A high-gain Source degenerative Cascode LNA for Wi-MAX and W-CDMA applications at 3.5GHz\",\"authors\":\"Naveen Motamarri, Munshi Nurul Islam, P. Apurbaranjan, S. Deepu, S. Prasantakumar\",\"doi\":\"10.1109/ICCICCT.2014.6993143\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design and simulation of High gain Source degenerated Cascode LNA for Wi-max and W-CDMA applications at 3.5GHz. The design uses an enhanced cascade topology to attain improved forward gain and noise figure. Th is design includes lumped elements like inductor, capacitor and resistors to design input and output matching networks. The targeted narrow-band gain, impedance matching and noise figure are achieved at the 3.5GHz. Circuit has been designed Using standard UMC 0.18μm CMOS technology and simulated in the Cadence Spectre RF tool. Targeted narrowband gain, noise figure, are 25dB and 2dB respectively. The designed circuit exhibits narrow-band gain of 27.18 dB and noise figure of 1.7 dB with Input and output return loss of -17.57 dB and -29.21 dB respectively. Circuit operates from the supply voltage of 1.8V and draws a current of 6.39mA.\",\"PeriodicalId\":6615,\"journal\":{\"name\":\"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)\",\"volume\":\"95 1\",\"pages\":\"1200-1204\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-07-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCICCT.2014.6993143\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCICCT.2014.6993143","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A high-gain Source degenerative Cascode LNA for Wi-MAX and W-CDMA applications at 3.5GHz
This paper presents the design and simulation of High gain Source degenerated Cascode LNA for Wi-max and W-CDMA applications at 3.5GHz. The design uses an enhanced cascade topology to attain improved forward gain and noise figure. Th is design includes lumped elements like inductor, capacitor and resistors to design input and output matching networks. The targeted narrow-band gain, impedance matching and noise figure are achieved at the 3.5GHz. Circuit has been designed Using standard UMC 0.18μm CMOS technology and simulated in the Cadence Spectre RF tool. Targeted narrowband gain, noise figure, are 25dB and 2dB respectively. The designed circuit exhibits narrow-band gain of 27.18 dB and noise figure of 1.7 dB with Input and output return loss of -17.57 dB and -29.21 dB respectively. Circuit operates from the supply voltage of 1.8V and draws a current of 6.39mA.