{"title":"一种低相位噪声CMOS压控差分环振荡器","authors":"R. Rahul, R. Thilagavathy","doi":"10.1109/ICCICCT.2014.6993110","DOIUrl":null,"url":null,"abstract":"The paper presents a novel low phase noise voltage-controlled ring oscillator designed in UMC 0.18μm technology. The proposed design contains nine stages of differential delay cells with multiple-pass loop architecture. Linear frequency - voltage characteristics are exhibited over a wide tuning range. The tuning range of nine-stage ring oscillator is 1.1-2.3 GHz. A phase noise of -108.13dBc/Hz was estimated at an offset of 1MHz from a center frequency of 1.8 GHz. The design uses a 1.8V supply and consumes a maximum power of 65mW while operating at 1.8GHz.","PeriodicalId":6615,"journal":{"name":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","volume":"8 1","pages":"1025-1028"},"PeriodicalIF":0.0000,"publicationDate":"2014-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A low phase noise CMOS voltage-controlled differential ring oscillator\",\"authors\":\"R. Rahul, R. Thilagavathy\",\"doi\":\"10.1109/ICCICCT.2014.6993110\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper presents a novel low phase noise voltage-controlled ring oscillator designed in UMC 0.18μm technology. The proposed design contains nine stages of differential delay cells with multiple-pass loop architecture. Linear frequency - voltage characteristics are exhibited over a wide tuning range. The tuning range of nine-stage ring oscillator is 1.1-2.3 GHz. A phase noise of -108.13dBc/Hz was estimated at an offset of 1MHz from a center frequency of 1.8 GHz. The design uses a 1.8V supply and consumes a maximum power of 65mW while operating at 1.8GHz.\",\"PeriodicalId\":6615,\"journal\":{\"name\":\"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)\",\"volume\":\"8 1\",\"pages\":\"1025-1028\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-07-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCICCT.2014.6993110\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCICCT.2014.6993110","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low phase noise CMOS voltage-controlled differential ring oscillator
The paper presents a novel low phase noise voltage-controlled ring oscillator designed in UMC 0.18μm technology. The proposed design contains nine stages of differential delay cells with multiple-pass loop architecture. Linear frequency - voltage characteristics are exhibited over a wide tuning range. The tuning range of nine-stage ring oscillator is 1.1-2.3 GHz. A phase noise of -108.13dBc/Hz was estimated at an offset of 1MHz from a center frequency of 1.8 GHz. The design uses a 1.8V supply and consumes a maximum power of 65mW while operating at 1.8GHz.
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