A scheme of logic self repair including local interconnects

Technology forecasts concerning the development of CMOS technologies predict a higher level of intermittent faults due to radiation effects, but also a higher density of permanent fault effects due to inevitable parameter shifts and higher stress factors. For high production yield and long-term dependable operation, mechanisms of built-in self repair that can be used after production test and in the field of application are becoming a must. The architecture introduced in this paper includes mechanisms for logic self repair that may also cover local interconnects.