Simulation and planning method for on-chip power distribution — An industry perspective

Power grid's planning in the early design stage is hard, but critical for the layout area and circuit performance. Full-chip level's accurate mathematical modeling of switching currents in the power grid is an almost impossible mission, although many previous research works have been existed [6–9]. We introduce two industry methods for the power distribution planning in the early design stage, especially in the region of standard cells as well as the full chip level. Modeling details of “simplified” current sources, for the full-chip power grid simulation in the early planning, are explained for one SOC example in the paper.