{"title":"基于小波的视频隐藏数据发送的硬件实现","authors":"E. Venkatesan, V. P. Kolanchinathan","doi":"10.1109/ICICES.2014.7034021","DOIUrl":null,"url":null,"abstract":"This paper presents a hardware implementation of a digital watermarking system that can insert invisible watermark information into video streams in real time. The watermark embedding is processed in the integer based wavelet transformation, lifting and least significant bits approach. To achieve high performance, the proposed system architecture employs pipeline structure and uses parallelism. Hardware implementation using field programmable gate array has been done, and an experiment was carried out using a custom versatile breadboard for overall performance evaluation. Experimental results show that a hardware-based video authentication system using this watermarking technique features minimum video quality degradation and can withstand certain potential attacks, i.e., cover-up attacks, cropping, and segment removal on video sequences. Furthermore, the proposed hardware based watermarking system features low power consumption, low cost implementation, high processing speed, and reliability.","PeriodicalId":13713,"journal":{"name":"International Conference on Information Communication and Embedded Systems (ICICES2014)","volume":"33 1","pages":"1-7"},"PeriodicalIF":0.0000,"publicationDate":"2014-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Hardware implementation for sending concealed data in video by using wavelets\",\"authors\":\"E. Venkatesan, V. P. Kolanchinathan\",\"doi\":\"10.1109/ICICES.2014.7034021\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a hardware implementation of a digital watermarking system that can insert invisible watermark information into video streams in real time. The watermark embedding is processed in the integer based wavelet transformation, lifting and least significant bits approach. To achieve high performance, the proposed system architecture employs pipeline structure and uses parallelism. Hardware implementation using field programmable gate array has been done, and an experiment was carried out using a custom versatile breadboard for overall performance evaluation. Experimental results show that a hardware-based video authentication system using this watermarking technique features minimum video quality degradation and can withstand certain potential attacks, i.e., cover-up attacks, cropping, and segment removal on video sequences. Furthermore, the proposed hardware based watermarking system features low power consumption, low cost implementation, high processing speed, and reliability.\",\"PeriodicalId\":13713,\"journal\":{\"name\":\"International Conference on Information Communication and Embedded Systems (ICICES2014)\",\"volume\":\"33 1\",\"pages\":\"1-7\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-02-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Conference on Information Communication and Embedded Systems (ICICES2014)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICES.2014.7034021\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Information Communication and Embedded Systems (ICICES2014)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICES.2014.7034021","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Hardware implementation for sending concealed data in video by using wavelets
This paper presents a hardware implementation of a digital watermarking system that can insert invisible watermark information into video streams in real time. The watermark embedding is processed in the integer based wavelet transformation, lifting and least significant bits approach. To achieve high performance, the proposed system architecture employs pipeline structure and uses parallelism. Hardware implementation using field programmable gate array has been done, and an experiment was carried out using a custom versatile breadboard for overall performance evaluation. Experimental results show that a hardware-based video authentication system using this watermarking technique features minimum video quality degradation and can withstand certain potential attacks, i.e., cover-up attacks, cropping, and segment removal on video sequences. Furthermore, the proposed hardware based watermarking system features low power consumption, low cost implementation, high processing speed, and reliability.