Huafang Ju, Xiang Li, J. Hsu, Shaohua Li, T. Su, Mo Liu, Kai Xiao
{"title":"印刷电路板(PCB)路由优化与创新的边缘连接器为PCI-Express 5.0和更高","authors":"Huafang Ju, Xiang Li, J. Hsu, Shaohua Li, T. Su, Mo Liu, Kai Xiao","doi":"10.1109/IMPACT56280.2022.9966709","DOIUrl":null,"url":null,"abstract":"PCI-Express (PCIe) data rate continues to double generation by generation from PCIe 4.0 with 16Gbps, PCIe 5.0 with 32Gbps to PCIe 6.0 with 64Gbps in recent years. However, data center motherboard form factor and landing zone requirement remain the same, which implies all enablers in channel need to be improved to meet the maximum board routing length. Because PCB and connector are important components in the platform channel, besides their perspective performance, connector pin field PCB footprint design can also play a big role in channel solution space and PCB cost. In this paper, PCB routing optimization is addressed through the connector footprint optimization and the connector design innovation.","PeriodicalId":13517,"journal":{"name":"Impact","volume":"14 1","pages":"1-4"},"PeriodicalIF":0.0000,"publicationDate":"2022-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Printed Circuit Board (PCB) Routing optimization with an Innovative Edge Connector for PCI-Express 5.0 and Beyond\",\"authors\":\"Huafang Ju, Xiang Li, J. Hsu, Shaohua Li, T. Su, Mo Liu, Kai Xiao\",\"doi\":\"10.1109/IMPACT56280.2022.9966709\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"PCI-Express (PCIe) data rate continues to double generation by generation from PCIe 4.0 with 16Gbps, PCIe 5.0 with 32Gbps to PCIe 6.0 with 64Gbps in recent years. However, data center motherboard form factor and landing zone requirement remain the same, which implies all enablers in channel need to be improved to meet the maximum board routing length. Because PCB and connector are important components in the platform channel, besides their perspective performance, connector pin field PCB footprint design can also play a big role in channel solution space and PCB cost. In this paper, PCB routing optimization is addressed through the connector footprint optimization and the connector design innovation.\",\"PeriodicalId\":13517,\"journal\":{\"name\":\"Impact\",\"volume\":\"14 1\",\"pages\":\"1-4\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-10-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Impact\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMPACT56280.2022.9966709\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Impact","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMPACT56280.2022.9966709","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Printed Circuit Board (PCB) Routing optimization with an Innovative Edge Connector for PCI-Express 5.0 and Beyond
PCI-Express (PCIe) data rate continues to double generation by generation from PCIe 4.0 with 16Gbps, PCIe 5.0 with 32Gbps to PCIe 6.0 with 64Gbps in recent years. However, data center motherboard form factor and landing zone requirement remain the same, which implies all enablers in channel need to be improved to meet the maximum board routing length. Because PCB and connector are important components in the platform channel, besides their perspective performance, connector pin field PCB footprint design can also play a big role in channel solution space and PCB cost. In this paper, PCB routing optimization is addressed through the connector footprint optimization and the connector design innovation.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
