buck型交直流并网飞容多电平变换器的功率因数校正与有源电压平衡联合控制技术

IF 1 4区 工程技术 Q4 COMPUTER SCIENCE, INTERDISCIPLINARY APPLICATIONS Compel-The International Journal for Computation and Mathematics in Electrical and Electronic Engineering Pub Date : 2023-06-25 DOI:10.1109/COMPEL52896.2023.10221009
Roderick S. Bayliss, Nathan C. Brooks, R. Pilawa-Podgurski
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引用次数: 0

摘要

单级功率因数校正(PFC) ac-dc整流器在目标直流电压低于峰值交流电压的并网整流器应用(例如数据中心供电,LED驱动器)中开辟了实现高功率密度和效率的途径。通常在数据中心和类似应用中,采用升压ac-dc级和降压dc-dc级的两级解决方案来实现电网到48v的转换。这种方法受到功率转换器级联的效率损失的影响,并且由于设计了两个独立的功率转换阶段,通常功率密度较低。输出直流电压低于峰值交流电压的单级buck型PFC整流器可以避免这些问题。本工作分析并开发了一种单级buck型PFC整流器,该整流器利用六电平飞电容多电平(FCML)转换器,具有主动飞电容电压平衡和电流控制,以实现单级解决方案中的高功率密度整流。这项工作是第一次在降压FCML整流器中实现电容器与PFC操作相结合的主动平衡。
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A Combined Power Factor Correcting and Active Voltage Balancing Control Technique for Buck-Type AC/DC Grid-Tied Flying Capacitor Multilevel Converters
Single-stage Power Factor Correction (PFC) ac-dc rectifiers open a pathway to achieve high power density and efficiency in grid-connected rectifier applications where the target dc voltage is lower than the peak ac voltage (e.g. data center power delivery, LED drivers). Typically in data center and similar applications, a two-stage solution employing a step-up ac-dc stage followed by a step-down dc-dc stage is employed to achieve grid to 48 V conversion. This approach suffers from the efficiency penalty of a cascade of power converters and typically lower power density due to the design of two separate power conversion stages. A single-stage, buck-type PFC rectifier where the output dc voltage is lower than the peak ac voltage circumvents these issues. This work analyzes and develops a single-stage buck-type PFC rectifier utilizing a six-level flying capacitor multilevel (FCML) converter with active flying capacitor voltage balancing and current control to achieve high power density rectification in a single-stage solution. This work is the first to achieve active balancing of capacitors combined with PFC operation in a step-down FCML rectifier.
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来源期刊
CiteScore
1.60
自引率
0.00%
发文量
124
审稿时长
4.2 months
期刊介绍: COMPEL exists for the discussion and dissemination of computational and analytical methods in electrical and electronic engineering. The main emphasis of papers should be on methods and new techniques, or the application of existing techniques in a novel way. Whilst papers with immediate application to particular engineering problems are welcome, so too are papers that form a basis for further development in the area of study. A double-blind review process ensures the content''s validity and relevance.
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