Π-gate纳米线TANOS多晶硅TFT非易失性存储器

2010 Silicon Nanoelectronics Workshop Pub Date : 2010-06-13 DOI:10.1109/SNW.2010.5562547

Min-Feng Hung, Jiang-Hung Chen, Yung-Chun Wu

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引用次数: 0

摘要

本研究展示了一种具有多晶硅纳米线(NW)通道和pi栅极(Π-gate)结构的TANOS非易失性存储器(NVM)。该TANOS NVM的Π-gate结构增加了电流(Ion)，降低了阈值电压(Vth)和亚阈值斜率(SS)，并扩大了存储窗口(ΔVth)。该NVM设备具有快速的程序/擦除(P/E)速度;3v的内存窗口可以通过在10µs内施加18v来实现。经104p / e循环后，仍能保持70%的初始记忆窗口。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Π-gate nanowires TANOS poly-Si TFT nonvolatile memory

This work we demonstrate a TANOS nonvolatile memory (NVM) with poly-Si nanowire (NW) channels and Pi-gate (Π-gate) structure. Π-gate structure in this TANOS NVM increase on current (Ion), decrease threshold voltage (Vth) and subthreshold slope (SS), and enlarge the memory window (ΔVth). This NVM device behaves fast program/erase (P/E) speed; 3 V memory window can be achieved by applying 18 V in 10 µs. The 70 % of initial memory window has been maintained after 10⁴ P/E-cycle stress.

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