采用Si/SiGe选择性蚀刻工艺制备单晶Si通道的三维堆叠有源层和垂直栅NAND闪存串

2010 Silicon Nanoelectronics Workshop Pub Date : 2010-06-13 DOI:10.1109/SNW.2010.5562551

Ju-Wan Lee, M. Jeong, H. Kwon, Byung-Gook Park, Hyungcheol Shin, Jong-Ho Lee

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引用次数: 2

摘要

我们提出了新的3d堆叠NAND闪存结构，并研究了不同S/D掺杂浓度、体掺杂类型、体掺杂浓度和存储电荷的关键特性。由于采用了晶体硅通道，我们获得了比多晶硅通道更高的电流。我们已经证明，相邻BLs之间的干扰可以通过使用公共S-B接触来消除。

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3-D stacked active layers and vertical gate NAND flash string with single-crystal Si channel by adopting Si/SiGe selective etch process

We have proposed new 3-D stacked NAND flash memory structure and investigated key characteristics in various S/D doping concentration, body doping types, body doping concentrations, and stored charge. Thanks to crystalline Si channel, we obtained higher current than that in poly-Si channel. We have shown the interference between adjacent BLs can be removed by using common S-B contact.

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2010 Silicon Nanoelectronics Workshop

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