{"title":"一种新型的级联多电平升压变换器馈入多电平逆变器,减少开关计数","authors":"K. Jayasudha, S. Vijayalakshmi, M. Marimuthu","doi":"10.1080/00207217.2023.2248665","DOIUrl":null,"url":null,"abstract":"ABSTRACT Novel cascaded multilevel converters fed multilevel inverter for the AC load is presented here. In an inverter, total harmonic distortion plays a vital role. With the aim of reducing the harmonic value, the number of levels of an inverter should be increased. This circuit consists of two multilevel converters, two level controllers and two H-Bridge inverters. The advantage of this topology is to obtain more number of levels in an output, fewer significant number of switches, voltage sources and passive components like capacitors and diodes. This circuit could be operated in two ways as symmetric, & asymmetric configurations. As a result of this topology, 19-level output can be obtained. The performance of this circuit is simulated by means of MATLAB, and the hardware result is proved with the simulation results.","PeriodicalId":54961,"journal":{"name":"International Journal of Electronics","volume":"7 1","pages":""},"PeriodicalIF":1.1000,"publicationDate":"2023-08-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Novel Cascaded Multilevel Boost converter fed Multilevel inverter with reduced switch count\",\"authors\":\"K. Jayasudha, S. Vijayalakshmi, M. Marimuthu\",\"doi\":\"10.1080/00207217.2023.2248665\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"ABSTRACT Novel cascaded multilevel converters fed multilevel inverter for the AC load is presented here. In an inverter, total harmonic distortion plays a vital role. With the aim of reducing the harmonic value, the number of levels of an inverter should be increased. This circuit consists of two multilevel converters, two level controllers and two H-Bridge inverters. The advantage of this topology is to obtain more number of levels in an output, fewer significant number of switches, voltage sources and passive components like capacitors and diodes. This circuit could be operated in two ways as symmetric, & asymmetric configurations. As a result of this topology, 19-level output can be obtained. The performance of this circuit is simulated by means of MATLAB, and the hardware result is proved with the simulation results.\",\"PeriodicalId\":54961,\"journal\":{\"name\":\"International Journal of Electronics\",\"volume\":\"7 1\",\"pages\":\"\"},\"PeriodicalIF\":1.1000,\"publicationDate\":\"2023-08-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Journal of Electronics\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://doi.org/10.1080/00207217.2023.2248665\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Journal of Electronics","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.1080/00207217.2023.2248665","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
A Novel Cascaded Multilevel Boost converter fed Multilevel inverter with reduced switch count
ABSTRACT Novel cascaded multilevel converters fed multilevel inverter for the AC load is presented here. In an inverter, total harmonic distortion plays a vital role. With the aim of reducing the harmonic value, the number of levels of an inverter should be increased. This circuit consists of two multilevel converters, two level controllers and two H-Bridge inverters. The advantage of this topology is to obtain more number of levels in an output, fewer significant number of switches, voltage sources and passive components like capacitors and diodes. This circuit could be operated in two ways as symmetric, & asymmetric configurations. As a result of this topology, 19-level output can be obtained. The performance of this circuit is simulated by means of MATLAB, and the hardware result is proved with the simulation results.
期刊介绍:
The International Journal of Electronics (IJE) supports technical applications and developing research at the cutting edge of electronics. Encompassing a broad range of electronic topics, we are a leading electronics journal dedicated to quickly sharing new concepts and developments the field of electronics.