{"title":"使用赛灵思ISE和Cadence的自动饮料自动售货机的设计与实现及其性能评估","authors":"V. Krishna, A. Monisha, S. Sadulla, J. Prathiba","doi":"10.1109/ICCCNT.2013.6726639","DOIUrl":null,"url":null,"abstract":"This paper describes the design and implementation of an automatic beverages vending machine using FSM as this technique has more advantages compared to previous ones used in vending machine design. The whole design is functionally verified using Xilinx ISE simulator 13.1 and the generated bit stream file has implemented in Virtex 5 XC5VLX50T FPGA board and its physical design has performed using Cadence Encounter and evaluated its optimized parameters.","PeriodicalId":6330,"journal":{"name":"2013 Fourth International Conference on Computing, Communications and Networking Technologies (ICCCNT)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2013-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":"{\"title\":\"Design and implementation of an automatic beverages vending machine and its performance evaluation using Xilinx ISE and Cadence\",\"authors\":\"V. Krishna, A. Monisha, S. Sadulla, J. Prathiba\",\"doi\":\"10.1109/ICCCNT.2013.6726639\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes the design and implementation of an automatic beverages vending machine using FSM as this technique has more advantages compared to previous ones used in vending machine design. The whole design is functionally verified using Xilinx ISE simulator 13.1 and the generated bit stream file has implemented in Virtex 5 XC5VLX50T FPGA board and its physical design has performed using Cadence Encounter and evaluated its optimized parameters.\",\"PeriodicalId\":6330,\"journal\":{\"name\":\"2013 Fourth International Conference on Computing, Communications and Networking Technologies (ICCCNT)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-07-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"16\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 Fourth International Conference on Computing, Communications and Networking Technologies (ICCCNT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCCNT.2013.6726639\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 Fourth International Conference on Computing, Communications and Networking Technologies (ICCCNT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCCNT.2013.6726639","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design and implementation of an automatic beverages vending machine and its performance evaluation using Xilinx ISE and Cadence
This paper describes the design and implementation of an automatic beverages vending machine using FSM as this technique has more advantages compared to previous ones used in vending machine design. The whole design is functionally verified using Xilinx ISE simulator 13.1 and the generated bit stream file has implemented in Virtex 5 XC5VLX50T FPGA board and its physical design has performed using Cadence Encounter and evaluated its optimized parameters.
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