{"title":"fastbus的基本原理","authors":"E.M Rimmer","doi":"10.1016/0252-7308(85)90017-0","DOIUrl":null,"url":null,"abstract":"<div><p>Fastbus is a standard parallel bus system for high speed and/or large-scale data acquisition and processing. It is built up from back-plane segments housed in crates, linked together by cable segments for intercrate communication. Each segment supports multiprocessors, and independent segment operation permits a high degree of parallelism. Handshake bus protocols that are uniform over the system ensure reliability, and both high and low speed devices can be accomodated. A synchronous mode provides for data block transfers at maximum speed. The fundamental structure of Fastbus and details of its basic operations are presented.</p></div>","PeriodicalId":100687,"journal":{"name":"Interfaces in Computing","volume":"3 1","pages":"Pages 1-18"},"PeriodicalIF":0.0000,"publicationDate":"1985-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0252-7308(85)90017-0","citationCount":"6","resultStr":"{\"title\":\"The fundamentals of fastbus\",\"authors\":\"E.M Rimmer\",\"doi\":\"10.1016/0252-7308(85)90017-0\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>Fastbus is a standard parallel bus system for high speed and/or large-scale data acquisition and processing. It is built up from back-plane segments housed in crates, linked together by cable segments for intercrate communication. Each segment supports multiprocessors, and independent segment operation permits a high degree of parallelism. Handshake bus protocols that are uniform over the system ensure reliability, and both high and low speed devices can be accomodated. A synchronous mode provides for data block transfers at maximum speed. The fundamental structure of Fastbus and details of its basic operations are presented.</p></div>\",\"PeriodicalId\":100687,\"journal\":{\"name\":\"Interfaces in Computing\",\"volume\":\"3 1\",\"pages\":\"Pages 1-18\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1985-02-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://sci-hub-pdf.com/10.1016/0252-7308(85)90017-0\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Interfaces in Computing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/0252730885900170\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Interfaces in Computing","FirstCategoryId":"1085","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/0252730885900170","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fastbus is a standard parallel bus system for high speed and/or large-scale data acquisition and processing. It is built up from back-plane segments housed in crates, linked together by cable segments for intercrate communication. Each segment supports multiprocessors, and independent segment operation permits a high degree of parallelism. Handshake bus protocols that are uniform over the system ensure reliability, and both high and low speed devices can be accomodated. A synchronous mode provides for data block transfers at maximum speed. The fundamental structure of Fastbus and details of its basic operations are presented.
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