{"title":"Design aids and test results for laser-programmable logic arrays","authors":"D. L. Allen, Richard Goldenberg","doi":"10.1109/ICCD.1990.130248","DOIUrl":null,"url":null,"abstract":"The time required to customized a logic array circuit can be reduced to minutes by the use of laser programming without the access and resistance limitations of electrically programmable devices. A restructable logic array (RLA) that can be completely tested before packaging and can be fabricated in a standard CMOS process has been developed. Its key element is a connective laser link device. Circuits of up to 1200 gate equivalents have been restructured, and a base array of 4000 raw gate equivalents is in fabrication. A chip architecture, associated testing, and electrical design features, as well as their use in custom circuits are described.<<ETX>>","PeriodicalId":441935,"journal":{"name":"Proceedings., 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors","volume":"24 7","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings., 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.1990.130248","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
The time required to customized a logic array circuit can be reduced to minutes by the use of laser programming without the access and resistance limitations of electrically programmable devices. A restructable logic array (RLA) that can be completely tested before packaging and can be fabricated in a standard CMOS process has been developed. Its key element is a connective laser link device. Circuits of up to 1200 gate equivalents have been restructured, and a base array of 4000 raw gate equivalents is in fabrication. A chip architecture, associated testing, and electrical design features, as well as their use in custom circuits are described.<>
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