Analysis of Open Defect Faults in Single 6T SRAM Cell Using R and C Parasitic Extraction Method

Abstract

As technology advances from micron to submicron, then submicron to deep submicron, the device density increases and the device becomes more complex, resulting in unwanted interconnections or disjunctions. Many existing fault models does not consider the parasitic effects, which causes undetectable faults. In this paper, we propose a new fault model that takes parasitic effects into account in order to detect and locate faults. In the proposed method, we consider node to node open defect, few multi node open defects for 45nm technology. Test results observed with few existing faults like No Access Faults, Undefined Read Faults, Undefined Write Faults and transition Faults, in addition these fault we observe few new faults named as Undefined Write Fault-1 (UWF1), Undefined Write Fault-0(UWF0) and Undefined Read Fault-1(URF1).