Yoshiki Hashimoto, Naoki Kaneda, K. Komoku, N. Itoh
{"title":"A Study on 23.8-43 GHz CMOS Low-Power Ultra-Wideband Injection-Locked Frequency Multiplier with Transformer Input","authors":"Yoshiki Hashimoto, Naoki Kaneda, K. Komoku, N. Itoh","doi":"10.23919/apmc55665.2022.9999959","DOIUrl":null,"url":null,"abstract":"Ultra-wideband CMOS low-power injection-locked frequency multiplier with transformer input circuit has been studied. Due to the linearity of the input circuitry, the ILFM with the proposed transformer-based input circuit can obtain a wide locking range compared to that with the conventional transistor input circuit. According to the measurement results, the maximum locking range is 57.5% from 23.8 GHz to 43.0 GHz output at $V_{DD} = 1.8\\ \\mathrm{V}$, $I_{DD} = 0.96\\ \\text{mA}$ and $P_{in} = 0\\ \\text{dBm}$. The lowest locked phase noise at 1 MHz offset from 28 GHz carrier frequency was −123 dBc/Hz. Used process technology is TSMC-180nm CMOS.","PeriodicalId":219307,"journal":{"name":"2022 Asia-Pacific Microwave Conference (APMC)","volume":"29 2","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-11-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 Asia-Pacific Microwave Conference (APMC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/apmc55665.2022.9999959","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Ultra-wideband CMOS low-power injection-locked frequency multiplier with transformer input circuit has been studied. Due to the linearity of the input circuitry, the ILFM with the proposed transformer-based input circuit can obtain a wide locking range compared to that with the conventional transistor input circuit. According to the measurement results, the maximum locking range is 57.5% from 23.8 GHz to 43.0 GHz output at $V_{DD} = 1.8\ \mathrm{V}$, $I_{DD} = 0.96\ \text{mA}$ and $P_{in} = 0\ \text{dBm}$. The lowest locked phase noise at 1 MHz offset from 28 GHz carrier frequency was −123 dBc/Hz. Used process technology is TSMC-180nm CMOS.