Research and VerilogHDL implementation of technology for motion estimation based on new three — step method

Abstract

In video compression, motion estimation based on block matching technology can effectively eliminate the large amount of time redundancy among video sequences, and is crucial for improving the compression efficiency. The full search algorithm can be used to obtain the optimal solution, but its implementation requires a large number of operations. So many fast search algorithms are proposed, like three-step method, new three-step method and four-step method. These algorithms can greatly reduce the computational complexity under certain conditions. This paper introduced a new three step method, based on the algorithm description, analysis and research of the search template and the performance of the algorithm, using VerilogHDL hardware description language to complete the design, and completed the function simulation imitation use software tools. The results show that the algorithm is superior to the three — step method in all aspects, and has strong adaptability.