Implementation of Ripple Carry Adder Using Full Swing Gate Diffusion Input

Abstract

In modern VLSI technology, power consumption is a key factor in all design decisions. Today's electronics sector has made low power a central feature. Power dissipation has changed dramatically as a result of the demand for low power, taking on equal importance to performance and space. Numerous electronic design systems depend heavily on low-power VLSI design. Important considerations include voltage leakage, power consumption, circuit efficiency, and implementation area to take into account while building any combinational or sequential circuits. Subtractors and multipliers are mostly built with the address when creating high-speed adders. Therefore, increasing adder efficiency is crucial for all CPUs. There are relatively few VLSI design strategies that provide the necessary extensibility both in terms of power and area, despite several attempts to optimize the power and space used by the multiplier module. Designing a ripple carry adder employing full swing gate diffusion input technology is possible. It is a novel approach to a low-power digital combinational circuit that enables a reduction in the size, area, and power requirements of digital circuits while keeping a low level of complexity in the logic architecture.