T. Mori, K. Aono, H. Sakai, K. Hasegawa, H. Yamada, T. Takemoto
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引用次数: 13
Abstract
A micro-programmable realtime image processor with an instruction cycle of 20ns will be described. A 7×7mm2, 45K transistor chip has been designed in a self-aligned bipolar technology. Dissipation is 2.5W.
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