Evaluation of scheduling heuristics for jitter reduction of real-time streaming applications on multi-core general purpose hardware

M. Westmijze, M. Bekooij, G. Smit, M. Schrijver
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引用次数: 5

Abstract

The real-time system research community has paid a lot of attention to the design of safety critical hard real-time systems for which the use of non-standard hardware and operating systems can be justified. However, stream processing applications like medical imaging systems are often not considered safety critical enough to justify the use of hard real-time techniques that would increase the cost of these systems significantly. Instead commercial off the shelf (COTS) hardware and OS are used, and techniques at the application level are employed to reduce the variation in the end-to-end latency of these imaging processing systems. In this paper, we study the effectiveness of a number of scheduling heuristics that are intended to reduce the latency and the jitter of stream processing applications that are executed on COTS multiprocessor systems. The proposed scheduling heuristics take the execution times of tasks into account as well as dependencies between the tasks, the data structures accessed by the tasks, and the memory hierarchy. Experiments were carried out on a quad core symmetric multiprocessing (SMP) Intel processor. These experiments show that the proposed heuristics can reduce the end-to-end latency with almost 60%, and reduce the variation in the latency with more than 90% when compared with a naive scheduling heuristic that does not consider execution times, dependencies and the memory hierarchy.
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多核通用硬件上实时流应用减少抖动的调度启发式评估
实时系统研究界对安全关键型硬实时系统的设计给予了很大的关注,因为使用非标准硬件和操作系统是合理的。然而,像医疗成像系统这样的流处理应用通常被认为不够安全,不足以证明使用硬实时技术是合理的,这将大大增加这些系统的成本。取而代之的是使用商用现货(COTS)硬件和操作系统,并采用应用程序级别的技术来减少这些成像处理系统端到端延迟的变化。在本文中,我们研究了一些调度启发式的有效性,这些启发式旨在减少在COTS多处理器系统上执行的流处理应用程序的延迟和抖动。提出的调度启发式方法考虑了任务的执行时间以及任务之间的依赖关系、任务访问的数据结构和内存层次结构。在四核对称多处理(SMP) Intel处理器上进行了实验。实验结果表明,与不考虑执行时间、依赖关系和内存层次结构的朴素调度启发式算法相比,所提出的启发式算法可以将端到端延迟减少近60%,将延迟变化减少90%以上。
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