G. Caiulo, F. Francesconi, V. Liberali, F. Maloberti
{"title":"Analog blocks for high-speed oversampled A/D converters","authors":"G. Caiulo, F. Francesconi, V. Liberali, F. Maloberti","doi":"10.1109/MWSCAS.1995.510197","DOIUrl":null,"url":null,"abstract":"The design of high performance sigma-delta converters involves high frequency operation. This constraint means analog blocks must be carefully designed to meet these requirements. BiCMOS technology offers advantages with respect to CMOS in realising high-speed analog blocks. This paper describes an operational amplifier and a comparator designed in BiCMOS technology. Suitable circuit solutions have been used to obtain the required values for DC gain, gain-bandwidth product and slew-rate. High-level simulations of both low-pass and band-pass oversampled converters indicate that the blocks designed allow a faster clock rate than CMOS and are suitable for operation in switched-capacitor circuits with sampling rate of up to 40 MHz.","PeriodicalId":165081,"journal":{"name":"38th Midwest Symposium on Circuits and Systems. Proceedings","volume":"171 ","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"38th Midwest Symposium on Circuits and Systems. Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.1995.510197","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
The design of high performance sigma-delta converters involves high frequency operation. This constraint means analog blocks must be carefully designed to meet these requirements. BiCMOS technology offers advantages with respect to CMOS in realising high-speed analog blocks. This paper describes an operational amplifier and a comparator designed in BiCMOS technology. Suitable circuit solutions have been used to obtain the required values for DC gain, gain-bandwidth product and slew-rate. High-level simulations of both low-pass and band-pass oversampled converters indicate that the blocks designed allow a faster clock rate than CMOS and are suitable for operation in switched-capacitor circuits with sampling rate of up to 40 MHz.