Analog blocks for high-speed oversampled A/D converters

G. Caiulo, F. Francesconi, V. Liberali, F. Maloberti
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引用次数: 4

Abstract

The design of high performance sigma-delta converters involves high frequency operation. This constraint means analog blocks must be carefully designed to meet these requirements. BiCMOS technology offers advantages with respect to CMOS in realising high-speed analog blocks. This paper describes an operational amplifier and a comparator designed in BiCMOS technology. Suitable circuit solutions have been used to obtain the required values for DC gain, gain-bandwidth product and slew-rate. High-level simulations of both low-pass and band-pass oversampled converters indicate that the blocks designed allow a faster clock rate than CMOS and are suitable for operation in switched-capacitor circuits with sampling rate of up to 40 MHz.
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用于高速过采样A/D转换器的模拟模块
高性能σ - δ变换器的设计涉及高频工作。这一限制意味着模拟模块必须仔细设计以满足这些要求。与CMOS相比,BiCMOS技术在实现高速模拟块方面具有优势。本文介绍了一种采用BiCMOS技术设计的运算放大器和比较器。采用了合适的电路方案来获得直流增益、增益带宽积和回转速率所需的值。低通和带通过采样转换器的高级仿真表明,所设计的模块允许比CMOS更快的时钟速率,并且适合在采样率高达40 MHz的开关电容电路中工作。
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