Process dependent static cache partitioning for real-time systems

D. Kirk
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引用次数: 35

Abstract

The author investigates the use of a priori knowledge of program behavior to partition an instruction cache of size C into a static partition of size S and an LRU partition of size C-S. The value of S is task-dependent and is nonzero for most programs running on the system. Example programs are presented, and their behavior in various size caches is discussed. Cache partitions are generated and evaluated to determine the increase in cache performance and predictability. A high-level hardware design is presented that provides the desired partitioning scheme.<>
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用于实时系统的与进程相关的静态缓存分区
作者研究了使用程序行为的先验知识将大小为C的指令缓存划分为大小为S的静态分区和大小为C-S的LRU分区。S的值与任务相关,对于系统上运行的大多数程序来说,S的值是非零的。给出了实例程序,并讨论了它们在不同大小缓存中的行为。生成并评估缓存分区,以确定缓存性能和可预测性的增加。提出了一种高级硬件设计,提供了所需的分区方案。
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