{"title":"Microcomputer bus architectures","authors":"Tayeb A. Giiuma, Kevin W. Hart","doi":"10.1109/SOUTHC.1996.535106","DOIUrl":null,"url":null,"abstract":"in this paper, the bus architecture of microcomputers based on the Intel 80/spl times/86 family of microprocessors will be explored. Specifically, the Industry Standard Architecture (ISA) will be introduced and its role in subsequent architecture designs will be examined. Bus architectures including the Extended Industry Standard Architecture (EISA), Micro-Channel Architecture (MCA), Video Electronics Standards Association (VESA) Local Bus Architecture, and Peripheral Component Interconnect (PCI) standards will be analyzed. The dependence of early bus designs on the host processor, as well as the effect of bus architecture design development of hardware and software will be discussed.","PeriodicalId":199600,"journal":{"name":"Southcon/96 Conference Record","volume":"64 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Southcon/96 Conference Record","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOUTHC.1996.535106","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
in this paper, the bus architecture of microcomputers based on the Intel 80/spl times/86 family of microprocessors will be explored. Specifically, the Industry Standard Architecture (ISA) will be introduced and its role in subsequent architecture designs will be examined. Bus architectures including the Extended Industry Standard Architecture (EISA), Micro-Channel Architecture (MCA), Video Electronics Standards Association (VESA) Local Bus Architecture, and Peripheral Component Interconnect (PCI) standards will be analyzed. The dependence of early bus designs on the host processor, as well as the effect of bus architecture design development of hardware and software will be discussed.