K. Iwata, S. Mochizuki, Motoki Kimura, H. Ueda, Keisuke Matsumoto, Kazushi Akie, T. Shibayama, Hiroshi Hatae, Hiromi Watanabe
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引用次数: 0
Abstract
A mobile digital-terrestrial-television SoC with two multi-standard video codec is integrated on a 5.3×5.4 mm2 die in 45 nm CMOS. The dual video codec with dynamic frequency selection and advanced tile-based address translation consumes 80 mW in real-time playback of full-HD MPEG-2 and SD H.264 streams from 64 bits width low-power DDR-SDRAM at 1.1V.
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