Hardware feasible offset and gain error correction for time-interleaved ADC

Sadeque Reza Khan, A. Ferdousi, Goangseog Choi
{"title":"Hardware feasible offset and gain error correction for time-interleaved ADC","authors":"Sadeque Reza Khan, A. Ferdousi, Goangseog Choi","doi":"10.1109/ISOCC.2017.8368881","DOIUrl":null,"url":null,"abstract":"An entirely digital method of TIADC error calibration is presented in this paper. The methodology is based on statistical properties of signals for error estimations particularly targeting mean and variance of samples. In the proposed algorithm offset mismatch can be corrected by subtracting the estimated offset from each sub-ADC digital samples. Similarly, gain mismatch can be corrected by multiplying the output of each sub-ADC by the inverse of its estimated gain and both of these corrections, offset and gain, are cost effective in terms of hardware.","PeriodicalId":248826,"journal":{"name":"2017 International SoC Design Conference (ISOCC)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International SoC Design Conference (ISOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISOCC.2017.8368881","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

Abstract

An entirely digital method of TIADC error calibration is presented in this paper. The methodology is based on statistical properties of signals for error estimations particularly targeting mean and variance of samples. In the proposed algorithm offset mismatch can be corrected by subtracting the estimated offset from each sub-ADC digital samples. Similarly, gain mismatch can be corrected by multiplying the output of each sub-ADC by the inverse of its estimated gain and both of these corrections, offset and gain, are cost effective in terms of hardware.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
时间交错ADC的硬件可行偏移和增益误差校正
提出了一种全数字化的TIADC误差标定方法。该方法基于信号的统计特性进行误差估计,特别是针对样本的均值和方差。在提出的算法中,可以通过从每个子adc数字样本中减去估计的偏移量来纠正偏移失配。同样,增益失配可以通过将每个子adc的输出乘以其估计增益的倒数来校正,并且这些校正,偏移和增益,在硬件方面都是具有成本效益的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Memory efficient self guided image filtering A fully-digital phase modulator with phase calibration loop for high data-rate systems Development of SoC virtual platform for IoT terminals based on OneM2M Hardware feasible offset and gain error correction for time-interleaved ADC A design of ultra-low noise LDO using noise reduction network techniques
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1