A sensitivity analysis of a new hardware-supported Global Synchronization Unit

E. Lynch, G. Riley
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引用次数: 1

Abstract

Historically, large-scale low-lookahead parallel simulation has been a difficult problem. As a solution, we have designed a Global Synchronization Unit (GSU) that would reside centrally on a multi-core chip and asynchronously compute the Lower Bound on Time Stamps (LBTS), the minimum timestamp of all unprocessed events in the simulation, on demand to synchronize conservative parallel simulators. Our GSU also accounts for transient messages, messages that have been sent but not yet processed by their recipient, eliminating the need for the simulator to acknowledge received messages. In this paper we analyze the sensitivity of simulation performance to the time required to access the GSU. The sensitivity analysis revealed that with GSU access times as high as hundreds of cycles, there was still a significant performance advantage over the baseline shared-memory implementation.
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一种新的硬件支持的全局同步单元的灵敏度分析
长期以来,大规模低前瞻并行仿真一直是一个难题。作为一种解决方案,我们设计了一个全局同步单元(GSU),它将驻留在多核芯片上,并根据需要异步计算时间戳下限(LBTS),即仿真中所有未处理事件的最小时间戳,以同步保守并行模拟器。我们的GSU还考虑了瞬态消息,即已发送但尚未被接收方处理的消息,从而消除了模拟器确认接收消息的需要。在本文中,我们分析了仿真性能对访问GSU所需时间的敏感性。灵敏度分析显示,即使GSU访问时间高达数百个周期,仍然比基线共享内存实现具有显著的性能优势。
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