HBM robustness optimization of fully isolated Nch-LDMOS for negative input voltage using unique index parameter

Abstract

To overcome the trade-off between breakdown voltage to negative bias and HBM robustness in fully isolated Nch-LDMOS, we found and utilized a new unique parameter for HBM robustness estimation, which focused on the electric field under the drain region when TLP pulse was applied. By using this unique index parameter, we successfully achieved the optimized Nch-LDMOS with keeping high breakdown voltage of 35.9 V to negative bias as well as high HBM robustness of 4700 V.