{"title":"Improved recycle folded cascode OTA with current control circuit","authors":"N. Mukahar, S. Kar","doi":"10.1109/SHUSER.2012.6268892","DOIUrl":null,"url":null,"abstract":"This paper presents an improved architecture of folded cascade OTA with current control circuit that achieves improved DC gain and settling time without sacrificing power and area. This is achieved by exploiting and using idle device in the signal path and separates the AC and DC path, which results in an enhanced transconductance, output resistance, gain, settling time and power dissipation. Recycle folded cascade amplifier architecture was implemented in 90 nm CMOS process with 1 V power supply. Simulation results shows that the proposed structure significantly increase the DC gain bandwidth compared to the recycle folded cascade OTA and consume very low power dissipation. Theoretical analysis and LTSpice simulations prove the performance of the new OTA.","PeriodicalId":426671,"journal":{"name":"2012 IEEE Symposium on Humanities, Science and Engineering Research","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE Symposium on Humanities, Science and Engineering Research","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SHUSER.2012.6268892","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper presents an improved architecture of folded cascade OTA with current control circuit that achieves improved DC gain and settling time without sacrificing power and area. This is achieved by exploiting and using idle device in the signal path and separates the AC and DC path, which results in an enhanced transconductance, output resistance, gain, settling time and power dissipation. Recycle folded cascade amplifier architecture was implemented in 90 nm CMOS process with 1 V power supply. Simulation results shows that the proposed structure significantly increase the DC gain bandwidth compared to the recycle folded cascade OTA and consume very low power dissipation. Theoretical analysis and LTSpice simulations prove the performance of the new OTA.