Finite Element Method for System-in-Package (SiP) Technology: Thermal Analysis Using Chip Cooling Laminate Chip (CCLC)

A. Oukaira, Dhaou Said, J. Zbitou, A. Lakhssassi
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引用次数: 2

Abstract

We present in this paper a new modified version of the System-in-Package (SiP) model based on three-layer chips. The idea is to add copper layers permitting to take up its thermal dissipation and to investigate the thermal performance we have used Finite Element Method (FEM) analyses with COMSOL Multiphysics®. The temperature variation in the numerical simulation shows that the maximum temperature value is decreasing with a flat temperature distribution compared to the traditional model. Moreover, in terms of the thermal conduction performance, the thermal management of the system packaging, Chip-Cooling-Laminate-Chip (CCLC) is achieving high reliability and resolution with low-cost micro-devices especially for the micro-medicine applications, when the temperature maximum in the chips is reduced by 64%.
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系统级封装(SiP)技术的有限元方法:基于芯片冷却层压芯片(CCLC)的热分析
本文提出了一种基于三层芯片的系统级封装(SiP)模型的改进版本。我们的想法是添加铜层,允许其散热,并研究热性能,我们使用COMSOL Multiphysics®的有限元方法(FEM)分析。数值模拟的温度变化表明,与传统模型相比,最高温量值逐渐减小,温度分布趋于平缓。此外,在热传导性能、系统封装的热管理方面,芯片冷却层压板芯片(CCLC)以低成本的微器件实现了高可靠性和高分辨率,特别是在微医学应用中,芯片的最高温度降低了64%。
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