Design-for-manufacturability (DFM) methodology and yield analysis for embedded RF circuits for system-in-package (SiP) applications

S. Mukherjee, M. Swaminathan
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Abstract

The rapidly evolving telecommunications market has led to the need for advanced RF circuits. Complex multi-band/multi-mode RF designs require accurate prediction early in the design schedule and time-to-market pressures require that design iterations be kept to a minimum. This paper presents a layout-level, multi-domain DFM methodology and yield optimization technique for embedded RF circuits for SiP-based wireless applications. The proposed concept consists of layout- level statistical diagnosis and yield optimization. The statistical analysis takes into account the effect of the thermo-mechanical stress and the process variations that are incurred in batch fabrication. The results show good correlation with measurement/electromagnetic (EM) data.
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用于系统级封装(SiP)应用的嵌入式射频电路的可制造性设计(DFM)方法和良率分析
快速发展的电信市场导致了对先进射频电路的需求。复杂的多频段/多模式射频设计需要在设计计划的早期进行准确的预测,而上市时间的压力要求将设计迭代保持在最低限度。本文提出了一种基于sip无线应用的嵌入式射频电路的布局级多域DFM方法和良率优化技术。提出的概念包括布局级统计诊断和良率优化。统计分析考虑了批量制造过程中产生的热机械应力和工艺变化的影响。结果与测量/电磁(EM)数据具有良好的相关性。
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