{"title":"Design-for-manufacturability (DFM) methodology and yield analysis for embedded RF circuits for system-in-package (SiP) applications","authors":"S. Mukherjee, M. Swaminathan","doi":"10.1109/APMC.2006.4429442","DOIUrl":null,"url":null,"abstract":"The rapidly evolving telecommunications market has led to the need for advanced RF circuits. Complex multi-band/multi-mode RF designs require accurate prediction early in the design schedule and time-to-market pressures require that design iterations be kept to a minimum. This paper presents a layout-level, multi-domain DFM methodology and yield optimization technique for embedded RF circuits for SiP-based wireless applications. The proposed concept consists of layout- level statistical diagnosis and yield optimization. The statistical analysis takes into account the effect of the thermo-mechanical stress and the process variations that are incurred in batch fabrication. The results show good correlation with measurement/electromagnetic (EM) data.","PeriodicalId":137931,"journal":{"name":"2006 Asia-Pacific Microwave Conference","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 Asia-Pacific Microwave Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APMC.2006.4429442","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The rapidly evolving telecommunications market has led to the need for advanced RF circuits. Complex multi-band/multi-mode RF designs require accurate prediction early in the design schedule and time-to-market pressures require that design iterations be kept to a minimum. This paper presents a layout-level, multi-domain DFM methodology and yield optimization technique for embedded RF circuits for SiP-based wireless applications. The proposed concept consists of layout- level statistical diagnosis and yield optimization. The statistical analysis takes into account the effect of the thermo-mechanical stress and the process variations that are incurred in batch fabrication. The results show good correlation with measurement/electromagnetic (EM) data.