{"title":"A high power latching RF MEMS capacitors bank","authors":"M. Bakri-Kassem, A. Aziz, R. Mansour","doi":"10.1109/IMOC.2015.7369147","DOIUrl":null,"url":null,"abstract":"A high power nickel based electroplated 4-bit RF MEMS capacitors bank is designed, fabricated and tested. The proposed design is capable to handle high power up to 30 Watts and utilizes co-planar transmission lines that use eight latching SPDT RF MEMS switches. The capacitors bank design is made of 4 cascaded bit units where every bit has two different paths, the first path is a conventional CPW while the second path is a CPW loaded with an inter-digitated capacitor. The measured maximum capacitance when all loaded CPW are engaged in almost 20 pF. The minimum measured capacitance however is 0.7 pF, at 1 GHz. The measured tuning ratio is around 28 times. The capacitors bank is built on high resistive silicon substrate using MetalMUMPs process.","PeriodicalId":431462,"journal":{"name":"2015 SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference (IMOC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference (IMOC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMOC.2015.7369147","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
A high power nickel based electroplated 4-bit RF MEMS capacitors bank is designed, fabricated and tested. The proposed design is capable to handle high power up to 30 Watts and utilizes co-planar transmission lines that use eight latching SPDT RF MEMS switches. The capacitors bank design is made of 4 cascaded bit units where every bit has two different paths, the first path is a conventional CPW while the second path is a CPW loaded with an inter-digitated capacitor. The measured maximum capacitance when all loaded CPW are engaged in almost 20 pF. The minimum measured capacitance however is 0.7 pF, at 1 GHz. The measured tuning ratio is around 28 times. The capacitors bank is built on high resistive silicon substrate using MetalMUMPs process.