{"title":"Research and Design of On-board Dynamic Reconfigurable Router","authors":"Chunjing Mao, Yong Guan, David Jungwirth","doi":"10.1109/NCM.2009.349","DOIUrl":null,"url":null,"abstract":"In order to satisfy the requirement of aerocraft’s multi- transmission for further development, the paper leads to a resolution about on-board dynamic reconfigurable Spacewire routing technology. Based on the network level analysis of Spacewire standard, it built the architecture of router with wormhole routing theory. A simulation model of router had been set to verify the design, and braking-problem from wormhole routing-blocking had been solved with BWR. And a prototype of dynamic reconfigurable router had been built by using the characteristic of high-speed processing and dynamic reconfiguration of FPGAs.","PeriodicalId":119669,"journal":{"name":"2009 Fifth International Joint Conference on INC, IMS and IDC","volume":"165 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-08-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 Fifth International Joint Conference on INC, IMS and IDC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NCM.2009.349","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In order to satisfy the requirement of aerocraft’s multi- transmission for further development, the paper leads to a resolution about on-board dynamic reconfigurable Spacewire routing technology. Based on the network level analysis of Spacewire standard, it built the architecture of router with wormhole routing theory. A simulation model of router had been set to verify the design, and braking-problem from wormhole routing-blocking had been solved with BWR. And a prototype of dynamic reconfigurable router had been built by using the characteristic of high-speed processing and dynamic reconfiguration of FPGAs.