Automatic generation of an FPGA based embedded test system for printed circuit board testing

Jorge Hernán Meza Escobar, J. SachBe, Steffen Ostendorff, H. Wuttke
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引用次数: 15

Abstract

This paper describes an FPGA based embedded test system, designed for testing of printed circuit boards during the manufacturing process. The test system architecture is automatically generated based on a layer description, which provides the required flexibility for the generation of the test system, and for the abstraction of the test functions. The test system is composed of a software and a hardware part, and generated based on the board's properties and the specified test algorithms. The paper presents the test system architecture and automatic generation flow, with emphasis on the software generation process. The paper also includes experimental results obtained when performing an SRAM interconnection test.
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基于FPGA的嵌入式印刷电路板测试系统的自动生成
本文介绍了一种基于FPGA的嵌入式测试系统,用于印制电路板制造过程中的测试。测试系统架构是基于层描述自动生成的,它为测试系统的生成和测试功能的抽象提供了所需的灵活性。测试系统由软件和硬件两部分组成,根据电路板的特性和指定的测试算法生成测试系统。本文介绍了测试系统的体系结构和自动生成流程,重点介绍了软件的生成过程。本文还包括在进行SRAM互连测试时获得的实验结果。
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Retiming scan circuit to eliminate timing penalty Variation-aware and self-healing design methodology for a system-on-chip Automatic generation of an FPGA based embedded test system for printed circuit board testing Investigation of a CMOS oscillator concept for particle detection and diagnosis Pattern-based injections in processors implemented on SRAM-based FPGAs
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