{"title":"A wideband varactor-tuned BICMOS Negative Inductance design","authors":"J. Paillot, D. Cordeau, T. Lagutere","doi":"10.1109/ICATE.2014.6972591","DOIUrl":null,"url":null,"abstract":"This paper describes the design of a wideband varactor-tuned BiCMOS Negative Inductance, with NXP semiconductors 0.25 μm BiCMOS SiGe process. The structure consists in a loop with a C-gyrator associated with an amplifier. This amplifier allows both inverting the impedance behaviour and obtaining a negative inductance. Furthermore, differential stages are used to benefit the floating effect to achieve a floating inductance. In these conditions, the capacitive effect is inverted and a Negative Impedance Converter is realized. For our application, the targeted value is -20 nH with a frequency range from 200 to 900 MHz. Firstly, this architecture has been presented in [1] by White and al. but in this paper we use a varactor which allows adjusting the negative value. At 2.7 V power supply voltage, a power of only 11 mW is dissipated.","PeriodicalId":327050,"journal":{"name":"2014 International Conference on Applied and Theoretical Electricity (ICATE)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 International Conference on Applied and Theoretical Electricity (ICATE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICATE.2014.6972591","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper describes the design of a wideband varactor-tuned BiCMOS Negative Inductance, with NXP semiconductors 0.25 μm BiCMOS SiGe process. The structure consists in a loop with a C-gyrator associated with an amplifier. This amplifier allows both inverting the impedance behaviour and obtaining a negative inductance. Furthermore, differential stages are used to benefit the floating effect to achieve a floating inductance. In these conditions, the capacitive effect is inverted and a Negative Impedance Converter is realized. For our application, the targeted value is -20 nH with a frequency range from 200 to 900 MHz. Firstly, this architecture has been presented in [1] by White and al. but in this paper we use a varactor which allows adjusting the negative value. At 2.7 V power supply voltage, a power of only 11 mW is dissipated.