A wideband varactor-tuned BICMOS Negative Inductance design

J. Paillot, D. Cordeau, T. Lagutere
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Abstract

This paper describes the design of a wideband varactor-tuned BiCMOS Negative Inductance, with NXP semiconductors 0.25 μm BiCMOS SiGe process. The structure consists in a loop with a C-gyrator associated with an amplifier. This amplifier allows both inverting the impedance behaviour and obtaining a negative inductance. Furthermore, differential stages are used to benefit the floating effect to achieve a floating inductance. In these conditions, the capacitive effect is inverted and a Negative Impedance Converter is realized. For our application, the targeted value is -20 nH with a frequency range from 200 to 900 MHz. Firstly, this architecture has been presented in [1] by White and al. but in this paper we use a varactor which allows adjusting the negative value. At 2.7 V power supply voltage, a power of only 11 mW is dissipated.
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宽带变容调谐BICMOS负感设计
本文介绍了采用恩智浦半导体0.25 μm BiCMOS SiGe工艺的宽带变容调谐BiCMOS负电感的设计。该结构由一个带有c形旋转器的环路和一个放大器组成。这个放大器既可以反转阻抗行为,又可以获得负电感。此外,差分级的使用有利于浮动效应,以实现浮动电感。在这种情况下,电容效应被逆转,实现了负阻抗变换器。对于我们的应用,目标值为-20 nH,频率范围为200至900 MHz。首先,White等人在b[1]中提出了这种结构,但在本文中,我们使用一个允许调整负值的变容器。在2.7 V电源电压下,仅耗散11mw的功率。
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