K. Yoshikawa, S. Yamada, J. Miyamoto, T. Suzuki, M. Oshikiri, E. Obi, Y. Hiura, K. Yamada, Y. Ohshima, S. Atsumi
{"title":"Comparison of current flash EEPROM erasing methods: stability and how to control","authors":"K. Yoshikawa, S. Yamada, J. Miyamoto, T. Suzuki, M. Oshikiri, E. Obi, Y. Hiura, K. Yamada, Y. Ohshima, S. Atsumi","doi":"10.1109/IEDM.1992.307431","DOIUrl":null,"url":null,"abstract":"The effects of process and device parameter fluctuations of flash EEPROM cells on the flash-erasing instabilities are systematically investigated using a simple analytical model and numerical simulation. Among various erase methods, the High voltage Source with grounded Erase (HSE) method is the most stable scheme for the control of erasing speed and erased threshold voltage distribution. The stability of HSE is caused by the reduced electric field fluctuations associated with cell parameter variations, due to the source bias effect, especially at the final stage of erasing. It is also found that the recently proposed self-convergence scheme is an effective tool for suppressing the erased-V/sub t/ distribution width, and that negative gate erase designs equipped with this method will be a powerful vehicle for the next generation scaled flash devices.<<ETX>>","PeriodicalId":287098,"journal":{"name":"1992 International Technical Digest on Electron Devices Meeting","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"39","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1992 International Technical Digest on Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.1992.307431","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 39
Abstract
The effects of process and device parameter fluctuations of flash EEPROM cells on the flash-erasing instabilities are systematically investigated using a simple analytical model and numerical simulation. Among various erase methods, the High voltage Source with grounded Erase (HSE) method is the most stable scheme for the control of erasing speed and erased threshold voltage distribution. The stability of HSE is caused by the reduced electric field fluctuations associated with cell parameter variations, due to the source bias effect, especially at the final stage of erasing. It is also found that the recently proposed self-convergence scheme is an effective tool for suppressing the erased-V/sub t/ distribution width, and that negative gate erase designs equipped with this method will be a powerful vehicle for the next generation scaled flash devices.<>
采用简单的解析模型和数值模拟方法，系统地研究了闪存EEPROM单元的工艺参数和器件参数波动对闪存擦除不稳定性的影响。在各种擦除方法中，高压源接地擦除(HSE)方法是控制擦除速度和擦除阈值电压分布最稳定的方案。由于源偏置效应，特别是在擦除的最后阶段，降低了与电池参数变化相关的电场波动，从而降低了HSE的稳定性。研究还发现，最近提出的自收敛方案是抑制擦除- v /sub - t/分布宽度的有效工具，并且配备这种方法的负栅擦除设计将成为下一代缩放闪存器件的强大载体。
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