{"title":"An algorithmic optimization method for design of /spl Sigma//spl Delta/ modulators","authors":"Azadeh Zahabi, O. Shoaei, Y. Koolivand, H. Shamsi","doi":"10.1109/ICM.2004.1434717","DOIUrl":null,"url":null,"abstract":"A two-stage optimization approach for the design of /spl Sigma//spl Delta/ modulators using genetic algorithm has been proposed. The method utilizes a new idea called gene-dependent fitness function, which takes some circuit-level non-idealities into account in the evaluation of the cost function. The combination of an equation-based and a high-level simulation-based genetic algorithm have been reduced conversion speed and consumed CPU time of the modulator design, significantly. Using the proposed approach, the optimized order, oversampling ratio and the DAC bit number to meet the specified specifications is obtained. This speedups the design process without extra time-consuming circuit simulations and transient analysis.","PeriodicalId":359193,"journal":{"name":"Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004.","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2004.1434717","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A two-stage optimization approach for the design of /spl Sigma//spl Delta/ modulators using genetic algorithm has been proposed. The method utilizes a new idea called gene-dependent fitness function, which takes some circuit-level non-idealities into account in the evaluation of the cost function. The combination of an equation-based and a high-level simulation-based genetic algorithm have been reduced conversion speed and consumed CPU time of the modulator design, significantly. Using the proposed approach, the optimized order, oversampling ratio and the DAC bit number to meet the specified specifications is obtained. This speedups the design process without extra time-consuming circuit simulations and transient analysis.