M. El-Soud, R. Abdelrassoul, H. Soliman, L. El-ghanam
{"title":"Low-power CMOS circuits for analog VLSI programmable neural networks","authors":"M. El-Soud, R. Abdelrassoul, H. Soliman, L. El-ghanam","doi":"10.1109/ICM.2003.238250","DOIUrl":null,"url":null,"abstract":"This paper presents an analog VLSI neural network for designing a programmable neural system. Synaptic weights are designed in the triode region using four-MOS transistors. Moreover, the summing element (SE) and the activation function are designed in subthreshold region. This system is realized in a standard 0.8 /spl mu/m CMOS technology and operated with a /spl plusmn/1V power supply.","PeriodicalId":180690,"journal":{"name":"Proceedings of the 12th IEEE International Conference on Fuzzy Systems (Cat. No.03CH37442)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 12th IEEE International Conference on Fuzzy Systems (Cat. No.03CH37442)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2003.238250","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper presents an analog VLSI neural network for designing a programmable neural system. Synaptic weights are designed in the triode region using four-MOS transistors. Moreover, the summing element (SE) and the activation function are designed in subthreshold region. This system is realized in a standard 0.8 /spl mu/m CMOS technology and operated with a /spl plusmn/1V power supply.
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