Yousfi Abderrahim, Bencherif Hichem, Saidi Lamir, Abdi Mohamed Amir
{"title":"Role of High-K and Gate Engineering in Improving Rf/Analog Performances of In 0.2 Ga0.8As/Al0.3Ga0.7As HEMT","authors":"Yousfi Abderrahim, Bencherif Hichem, Saidi Lamir, Abdi Mohamed Amir","doi":"10.1109/CCEE.2018.8634517","DOIUrl":null,"url":null,"abstract":"This work deals with the potential benefit of double gate field plate MOS-HEMT using Si3N4 as high-K for RF and analog applications. Analog and RF performances investigation is done using 2D Silvaco TCAD for a wide range of gate voltage (VGS). The designed device shows better performances in terms of drain current (Id), cutoff frequency (fc), trans conductance $(g_{m})$ in contrast to the conventional Recessed Gate Pseudomorphic HEMT (RGP HEMT). However, a reduced trans conductance generation factor (gm/Id) is noticed. Simulation results are satisfactory and a drain current of $460 \\mu A/\\mu m$, a maximum gain of 447 dB, a peak gm of $4.22 ms/\\mu m$, and 520 GHz for fC are obtained. The efficiency of the proposed design is highlighted for high power and high-frequency applications.","PeriodicalId":200936,"journal":{"name":"2018 International Conference on Communications and Electrical Engineering (ICCEE)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Conference on Communications and Electrical Engineering (ICCEE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CCEE.2018.8634517","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This work deals with the potential benefit of double gate field plate MOS-HEMT using Si3N4 as high-K for RF and analog applications. Analog and RF performances investigation is done using 2D Silvaco TCAD for a wide range of gate voltage (VGS). The designed device shows better performances in terms of drain current (Id), cutoff frequency (fc), trans conductance $(g_{m})$ in contrast to the conventional Recessed Gate Pseudomorphic HEMT (RGP HEMT). However, a reduced trans conductance generation factor (gm/Id) is noticed. Simulation results are satisfactory and a drain current of $460 \mu A/\mu m$, a maximum gain of 447 dB, a peak gm of $4.22 ms/\mu m$, and 520 GHz for fC are obtained. The efficiency of the proposed design is highlighted for high power and high-frequency applications.