Modeling of common-mode failures in digital embedded systems

Abstract

This paper demonstrates how to accurately model the effects of common mode failures for digital embedded systems. By modeling the system's information flow, the integrated nature of the software and hardware components contained within such a system is represented. This modeling scheme allows for the system to be partitioned into error containment regions (ECRs), which are an extension of the fault containment region (FCR) concept. These ECRs are defined such that an error at their boundary results in system failure. If two or more ECRs produce errors at their boundaries and the underlying cause of these errors is identical, then the identification of common mode failures is achieved.