SPRED: Spatially Distributed Laser Fault Injection Resilient Design

Tasnuva Farheen, Shahin Tajik, Domenic Forte
{"title":"SPRED: Spatially Distributed Laser Fault Injection Resilient Design","authors":"Tasnuva Farheen, Shahin Tajik, Domenic Forte","doi":"10.1109/ISQED57927.2023.10129398","DOIUrl":null,"url":null,"abstract":"Computing systems’ hardware implementation is vulnerable to physical attacks. One of the most powerful tools in the arsenal of physical attacks is laser fault injection (LFI), which can successfully compromise an embedded cryptographic implementation even with a single fault. Several countermeasures have been proposed to prevent and detect LFI attacks. However, these schemes cannot protect a multi-spot laser fault injection setup alone. Vulnerabilities can be addressed in such circumstances using a multi-layer or defense-in-depth approach. Defense-in-depth refers to implementing several independent countermeasures within a device to provide aggregated protection against various attack vectors. In this paper, we introduce a multi-layer countermeasure where the proposed approach protects an LFI attack detector against multi-spot LFI attacks. We design and simulate a spatially distributed multi-gate driven design, called SPRED, to prevent single and multi-spot LFI attacks. Simulation results show that the distribution of gates in SPRED forces an attacker to use higher laser power and a thinner wafer to inject a fault.","PeriodicalId":315053,"journal":{"name":"2023 24th International Symposium on Quality Electronic Design (ISQED)","volume":"293 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-04-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 24th International Symposium on Quality Electronic Design (ISQED)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED57927.2023.10129398","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

Computing systems’ hardware implementation is vulnerable to physical attacks. One of the most powerful tools in the arsenal of physical attacks is laser fault injection (LFI), which can successfully compromise an embedded cryptographic implementation even with a single fault. Several countermeasures have been proposed to prevent and detect LFI attacks. However, these schemes cannot protect a multi-spot laser fault injection setup alone. Vulnerabilities can be addressed in such circumstances using a multi-layer or defense-in-depth approach. Defense-in-depth refers to implementing several independent countermeasures within a device to provide aggregated protection against various attack vectors. In this paper, we introduce a multi-layer countermeasure where the proposed approach protects an LFI attack detector against multi-spot LFI attacks. We design and simulate a spatially distributed multi-gate driven design, called SPRED, to prevent single and multi-spot LFI attacks. Simulation results show that the distribution of gates in SPRED forces an attacker to use higher laser power and a thinner wafer to inject a fault.
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SPRED:空间分布式激光故障注入弹性设计
计算系统的硬件实现容易受到物理攻击。物理攻击库中最强大的工具之一是激光故障注入(LFI),即使只有一个故障,它也可以成功地破坏嵌入式加密实现。提出了几种防范和检测LFI攻击的对策。然而,这些方案不能单独保护多点激光故障注入装置。在这种情况下,可以使用多层或纵深防御方法来解决漏洞。纵深防御是指在设备内部实施多个独立的防御措施,对各种攻击向量提供聚合防护。在本文中,我们介绍了一种多层对抗方法,该方法可以保护LFI攻击检测器免受多点LFI攻击。我们设计并模拟了一个空间分布的多门驱动设计,称为SPRED,以防止单点和多点LFI攻击。仿真结果表明,SPRED中栅极的分布迫使攻击者使用更高的激光功率和更薄的晶片注入故障。
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