Architectural trade-offs for SiGe BiCMOS direct conversion receiver front-ends for IEEE802.11a

Abstract

We present two different approaches towards development of direct conversion receiver front-ends for IEEE802.11a applications in IBM's SiGe BiCMOS technology. These approaches include: a) conventional 50 /spl Omega/ system, b) fully monolithic front-end. The developed ICs are targeted for the upper U-NII band at frequency range of 5.725-5.825 GHz and include a low noise amplifier (LNA), two mixers in quadrature, and a frequency divider. All of these circuits use fully on chip implementation. The LNA provides a gain of 11 dB, noise figure of 4.4 dB, IIP3 of -2dBm and occupies an area of 0.7 mm/spl times/0.7 mm. A micromixer topology has been adopted in the case of the 50 /spl Omega/ system and provides 9.2 dB gain, input matching of 16 dB, double sideband noise figure of 19.5 dB, input 1 dB compression point of -3 dBm, IIP3 and IIP2 of +6 and +32 dBm respectively and occupies an area of 1.6 mm/spl times/1 mm. The fully integrated receiver utilizes single-ended Gilbert cell mixers, and occupies a compact area of 1.6 mm/spl times/1.3 mm. It exhibits 20.2 dB gain, input 1 dB compression point (input P1dB) of -15.5 dBm, input matching of 15 dB, IIP3 and IIP2 of -3 dBm and +31 dBm respectively, double sideband noise figure of 7.1 dB, and LO to RF leakage of 78 dB. The LNA draws 5.78 mA from a 2.8 V supply, both micromixers draw 10.3 mA from 3.1 V supply, both Gilbert cell mixers draw 12.71 mA from a 3.75 V supply, and the frequency divider draws 22 mA from a 3.75 V supply.