S. S. Pereira, L. Almeida, Arnaldo S. R. Oliveira, N. B. Carvalho, P. Monteiro
{"title":"Improving Coding Efficiency in All-digital Transmitters","authors":"S. S. Pereira, L. Almeida, Arnaldo S. R. Oliveira, N. B. Carvalho, P. Monteiro","doi":"10.1109/RWS55624.2023.10046314","DOIUrl":null,"url":null,"abstract":"In this paper, coding efficiency (CE) of all-digital transmitters (ADTs) is improved using pulse amplitude modulation (PAM-4), decision threshold optimisation, and delta-sigma core state propagation. Results show a significant decrease in out-of-band noise, with over 10 dB noise reduction, when compared with a similar traditional one-bit ADT. This, not only, provided a more flexible transmitter due to the lower quality analog filter requirements, but also increased the energy efficiency. Such improvements were achieved using similar levels of field programmable gate array (FPGA) resource usage as the traditional one-bit ADT.","PeriodicalId":110742,"journal":{"name":"2023 IEEE Radio and Wireless Symposium (RWS)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-01-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE Radio and Wireless Symposium (RWS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RWS55624.2023.10046314","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, coding efficiency (CE) of all-digital transmitters (ADTs) is improved using pulse amplitude modulation (PAM-4), decision threshold optimisation, and delta-sigma core state propagation. Results show a significant decrease in out-of-band noise, with over 10 dB noise reduction, when compared with a similar traditional one-bit ADT. This, not only, provided a more flexible transmitter due to the lower quality analog filter requirements, but also increased the energy efficiency. Such improvements were achieved using similar levels of field programmable gate array (FPGA) resource usage as the traditional one-bit ADT.