High density and reliable packaging technology with Non Conductive Film for 3D/TSV

K. Mori, Yoshihiro Ono, Shinji Watanabe, Toshikazu Ishikawa, Michiaki Sugiyama, S. Imasu, T. Ochiai, Ryo Mori, Tsuyoshi Kida, Tomoaki Hashimoto, Hideki Tanaka, M. Kimura
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引用次数: 6

Abstract

The innovative flip chip assembly process with Non Conductive Film (NCF) contributes to high density and reliable 3D/TSV integrations has been developed and demonstrated. The target package had two tier structure which consisted of a logic device and Wide I/O DRAM. The logic device was fabricated by via-middle process and accompanied with 1200 TSVs, a thickness of 50 μm and 40 μm / 50 μm bump pitch layout. Thermal-compression bonding method with Cu pillar was applied to both connections between the memory die and the logic die and between the logic die and an organic substrate so that the high reliability could be achieved. In this work, NCF laminated on substrates was selected as an underfill material to establish robust process for 3D integrations and to realize the cost effective assembly. As reliability test items, 1500-cycle temperature cycling test, 1000h high temperature storage test, 1000h high humidity test, 500h unbiased highly accelerated stress test and 300h pressure cooker test were performed. Furthermore, 28 nm logic device and Wide I/O DRAM were assembled into the 3D structure with this new technology and 12.8 GB/s transmission and 89 % reduction of I/O power compared to LPDDR3 were demonstrated.
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高密度、可靠的3D/TSV非导电薄膜封装技术
采用非导电膜(NCF)的创新倒装芯片组装工艺有助于高密度和可靠的3D/TSV集成。目标封装具有两层结构,由逻辑器件和宽I/O DRAM组成。该逻辑器件采用中间过孔工艺制作,并配有1200个tsv,厚度为50 μm,凹凸间距为40 μm / 50 μm。存储芯片与逻辑芯片之间以及逻辑芯片与有机衬底之间的连接均采用了铜柱热压缩键合方法,从而实现了高可靠性。在这项工作中,选择在基板上层压的NCF作为下填充材料,以建立强大的3D集成工艺,并实现成本效益的组装。作为可靠性试验项目,进行了1500循环温度试验、1000h高温贮存试验、1000h高湿试验、500h无偏高加速应力试验和300h高压锅试验。此外,将28nm逻辑器件和Wide I/O DRAM组装成3D结构,证明了与LPDDR3相比,该技术的传输速率为12.8 GB/s, I/O功耗降低89%。
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