Grounding technique for EFT and Surge test

Sarang J. Gulhane, Akshay Ratnaparkhe
{"title":"Grounding technique for EFT and Surge test","authors":"Sarang J. Gulhane, Akshay Ratnaparkhe","doi":"10.1109/INCEMIC.2016.7921492","DOIUrl":null,"url":null,"abstract":"This paper provides grounding technique for immunity test like EFT and Surge which is most commonly required for any of the industrial or commercial product. The objective of this paper is to provide the practical and experimental grounding techniques to comply with immunity tests such as fast transients and fast burst in other terms which are called as low energy and high energy immunity test. The proper selection of grounding scheme depend upon specific application in use. For example a single-point grounding scheme operates better at low frequencies (signal frequencies below 300 kHz), and a multipoint ground behaves best at high frequencies (30MHz to 1GHz). Many system-level EMI problems can be avoided by paying careful attention to the grounding scheme used. Common-mode, common-ground impedance problems may be reduced by application of one or more of below techniques — a. Eliminate common impedance by using a single point ground. b. Separate and isolate grounds on the basis of signal type, level, and its frequency. c. Minimize ground impedance using ground bus, ground plane, or ground grid during PCB design. d. Use an inductor/capacitor in the ground connection to provide high-or low-frequency isolation. e. Reduce the common-mode ground loop currents by floating circuits or equipment; using optical isolators; or inserting common-mode filters, chokes, or isolation transformers.","PeriodicalId":333702,"journal":{"name":"2016 International Conference on ElectroMagnetic Interference & Compatibility (INCEMIC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 International Conference on ElectroMagnetic Interference & Compatibility (INCEMIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INCEMIC.2016.7921492","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

This paper provides grounding technique for immunity test like EFT and Surge which is most commonly required for any of the industrial or commercial product. The objective of this paper is to provide the practical and experimental grounding techniques to comply with immunity tests such as fast transients and fast burst in other terms which are called as low energy and high energy immunity test. The proper selection of grounding scheme depend upon specific application in use. For example a single-point grounding scheme operates better at low frequencies (signal frequencies below 300 kHz), and a multipoint ground behaves best at high frequencies (30MHz to 1GHz). Many system-level EMI problems can be avoided by paying careful attention to the grounding scheme used. Common-mode, common-ground impedance problems may be reduced by application of one or more of below techniques — a. Eliminate common impedance by using a single point ground. b. Separate and isolate grounds on the basis of signal type, level, and its frequency. c. Minimize ground impedance using ground bus, ground plane, or ground grid during PCB design. d. Use an inductor/capacitor in the ground connection to provide high-or low-frequency isolation. e. Reduce the common-mode ground loop currents by floating circuits or equipment; using optical isolators; or inserting common-mode filters, chokes, or isolation transformers.
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EFT和浪涌试验的接地技术
本文介绍了各种工业或商业产品中最常用的抗扰度试验(如电涌和电闪)的接地技术。本文的目的是提供实用的和实验的接地技术,以满足快速瞬变和快速突发等抗扰试验,即低能和高能抗扰试验。接地方案的正确选择取决于具体的使用场合。例如,单点接地方案在低频(信号频率低于300 kHz)下工作得更好,而多点接地方案在高频(30MHz至1GHz)下工作得最好。许多系统级的电磁干扰问题可以通过仔细注意所使用的接地方案来避免。通过应用以下一种或多种技术,可以减少共模、共地阻抗问题:a.使用单点接地消除共地阻抗。b.根据信号类型、电平和频率进行接地分离和隔离。c.在PCB设计时,使用接地母线、接平面或接地网来减小接地阻抗。d.在接地连接中使用电感/电容,以提供高频或低频隔离。e.通过浮动电路或设备减小共模接地回路电流;使用光隔离器;或插入共模滤波器、扼流圈或隔离变压器。
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