{"title":"Best ways to use billions of devices on a chip - Error predictive, defect tolerant and error recovery designs","authors":"Kazutoshi Kobayashi, H. Onodera","doi":"10.1109/ASPDAC.2008.4484065","DOIUrl":null,"url":null,"abstract":"Error rates on an LSI are increasing according to the Moore's law. Now is the time to start incorporating error-tolerant design methodologies. This paper introduces sources of failures in semiconductor devices, levels of dependability according to applications of devices and some circuit-level techniques to detect or recover faults after shipping.","PeriodicalId":277556,"journal":{"name":"2008 Asia and South Pacific Design Automation Conference","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 Asia and South Pacific Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.2008.4484065","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Error rates on an LSI are increasing according to the Moore's law. Now is the time to start incorporating error-tolerant design methodologies. This paper introduces sources of failures in semiconductor devices, levels of dependability according to applications of devices and some circuit-level techniques to detect or recover faults after shipping.
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